HC17.S8T4.Xbox 360 System Architecture.ppt

Source: www.hotchips.org
Topic: Xbox 360

Short Desciption:
Xbox 360 was designed from the ground up specifically ... Microsoft Xbox 360 Xbox XNA Visual C++ Windows Win32 Direct3D and the Xbox 360 logo and ...

 

Content Inside:
HC17.S8T4.Xbox 360 System Architecture.pptPage 1Xbox 360 System ArchitectureJeff AndrewsNick BakerXbox Semiconductor TechnologyGroupPage 2Hot Chips 172Hot Chips Presentation Hardware Specs Architectural Choices Programming Environment QAPage 3Hot Chips 173Overview Design Principles Next generation gaming Flexibility Programmability Optimized for achievable performancePage 4Hot Chips 174Hardware Designed for Games Triplecore 3.2 GHz custom CPU Shared 1MB L2 cache Customized vector floating point unit per core 5.4Gbps FSB: 10.8 GB/sec read and 10.8 GB/sec write GPU can read from L2 500 MHz custom GPU 48 parallel unified shaders 10 MB embedded DRAM for frame buffer: 256 GB/sec 512 MB unified memory 700Mhz GDDR3: 22.4 GB/sec 12X duallayer DVD 20 GB hard drive High Definition video outPage 5Hot Chips 175System Block DiagramCore0Core1Core21MB L2L1DCPUGPU10MBEDRAM512 MBDRAMMemoryI/OChip3D CoreDVD (SATA)HDD port (SATA)Rear Panel USBWireless controllersMU ports (2 USB)Front controllers (2 USB)EthernetXMA DecoderIRAudio OutFLASHSMCSystem controlMC0MC1BIU/IO IntfVideoOutVideo OutL1IL1D L1IL1D L1IAnalogChipPage 6Hot Chips 176CPU Chip/PPC Core Specs Three 3.2 GHz PowerPC cores Shared 1MB L2 cache 8way set associative PerCore Features 2issue per cycle inorder decoupled Vector/Scalar issue queue 2 symmetric fine grain hardware threads L1 Caches: 32K 2way I$ / 32K 4way D$ Execution pipelines Branch Unit Integer Unit Load/Store Unit VMX128 Units: Floating Point Unit Permute Unit Simple Unit Scalar FPU VMX128 enhanced for game and graphics workloads All execution units 4way SIMD 128 128bit vector registers per thread Custom dotproduct instruction Native D3D compressed data formatsPage 7Hot Chips 177CPU DiagramL2Node Crossbar / QueuingUncachedUnit0UncachedUnit1UncachedU nit2L2 DataL2DirL2DirBus InterfaceTestDebugClocksTempSensorFront Side Bus (FSB)PICMMUVMXFPVMXPermVMXSimpFPUVSUIntL1D 32KLd/StInstruction UnitVIQL1I32KBranchCore 2MMUVMXFPVMXPermVMXSimpFPUVSUIntL1D32KLd/S tInstruction Un ...

 

 

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